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general description the MAX9670/max9671 dual scart matrices route audio and video signals between a set-top box decoder chip and two external scart connectors under i 2 c control. operating from a 3.3v supply and a 12v supply, the MAX9670/max9671 consume 70mw during quiescent operation and 471mw during average operation when driving typical signals into typical loads. video input detection, video load detection, and a 2.5mw standby mode facilitate the design of intelli- gent, low-power set-top boxes. the MAX9670/max9671 audio section contains a buffered crosspoint to route audio inputs to audio out- puts and programmable volume control from -62db to 0db in 2db steps. the directdrive output amplifiers create a 2v rms full-scale audio signal biased around ground, eliminating the need for bulky output capaci- tors and reducing click-and-pop noise. the zero-cross detection circuitry also further reduces clicks and pops by enabling audio sources to switch only during a zero- crossing. the max9671 offers tv left and right audio inputs. the MAX9670/max9671 video section contains a buffered crosspoint to route video inputs to video out- puts. the standard-definition video signals from the set- top box decoder chip are lowpass filtered to remove out-of-band artifacts. the MAX9670/max9671 also support slow-switching and fast-switching signals. an interrupt signal from the MAX9670/max9671 informs the microcontroller when the system status has changed. applications set-top boxes tvs dvd players features 70mw quiescent power consumption 2.5mw standby mode consumption programmable audio gain control of -62db to 0db (tv audio outputs) clickless, popless, directdrive audio video input and video load detection video reconstruction filter with 10mhz passband and 52db attenuation at 27mhz 3.3v and 12v supply voltages MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ________________________________________________________________ maxim integrated products 1 19-4653; rev 0; 7/09 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available ordering information part temp range pin- package tv r+l audio inputs MAX9670 ctl+ 0? to +70? 40 tqfn-ep* no max9671 cth+ 0? to +70? 44 tqfn-ep* yes + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. directdrive is a registered trademark of maxim integrated products, inc. typical application circuit appears at end of data sheet. i 2 c interface registers and activity monitor video filters and crosspoint audio crosspoint with directdrive outputs, volume control slow switching fast switching charge pump v 12 v aud v vid 12v 3.3v 3.3v ep gndvid c video encoder stereo audio dac i 2 c interrupt output rgb, y/c, cvbs single-ended r/l stereo audio rgb, y/c, cvbs cvbs l/r audio (max9671 only) slow switching y/c, cvbs rgb, y/c, cvbs l/r audio slow switching stb chip tv scart vcr scart fast switching fast switching l/r audio (MAX9670 only) MAX9670/max9671 system block diagram
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v vid to gndvid........................................................-0.3v to +4v v 12 to ep.................................................................-0.3v to +14v v aud to ep ...............................................................-0.3v to +4v ep to gndvid .......................................................-0.1v to +0.1v all video inputs, vcrin_fs to gndvid...................-0.3v to +4v all audio inputs to ep .........................................-1v to (ep + 1v) sda, scl, dev_addr, int to gndvid ..................-0.3v to +4v tv_ss, vcr_ss to ep .................................-0.3v to (v 12 + 0.3v) current all video/audio inputs ...................................................?0ma c1p, c1n, cpvss .........................................................?0ma output short-circuit current duration video and fast-switching outputs to v vid , gndvid.................................................................continuous audio outputs to v aud , ep .....................................continuous tv_ss, vcr_ss to v 12 , ep......................................continuous continuous power dissipation (t a = +70?) 40-pin tqfn-ep (derate 26.3mw/? above +70?) ...2105.3mw 44-pin tqfn-ep (derate 26.3mw/? above +70?)...2 222.2mw operating temperature range...............................0? to +70? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units video supply voltage range v vid inferred from video psrr test at 3v and 3.6v 3 3.3 3.6 v audio supply voltage range v aud inferred from audio psrr test at 3v and 3.6v 3 3.3 3.6 v v 12 supply voltage range v 12 inferred from slow-switching levels 11.4 12 12.6 v normal operation; all video output amplifiers are enabled and muted (note 2) 16 30 ma standby mode, slow switch inputs low 1500 v vid quiescent supply current i vid_q shutdown 35 ? normal operation (note 2) 3.2 6 ma v aud quiescent supply current i aud_q shutdown 35 ? slow-switching output set to low-level 0.3 100 normal operation (note 2) slow-switching output set to medium-level 475 ? v 12 quiescent supply current i 12_q shutdown, t a = +25? 10 a video characteristics dc-coupled input v vid = 3v 1.15 v vid = 3.135v 1.15 input voltage range v in r l = 75 ? to gndvid or 150 ? to v vid /2; inferred from gain test v vid = 3.3v 1.3 v p-p input current i in v in = 0.3v, t a = +25? 1 2 a input resistance r in 300 k ?
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units ac-coupled input sync-tip clamp level v clp sync-tip clamp -13 -4 +6 mv sync crush s ync- ti p cl am p ; p er centag e r ed ucti on i n sync p ul se ( 0.3v p - p ) ; g uar anteed b y i np ut cl am p i ng cur r ent m easur em ent, t a = + 25 c 2% input clamping current sync-tip clamp, v in = 0.3v, t a = +25? 1 2 a maximum input source resistance input sync-tip circuit must be stable even if the source resistance is as high as 300 ? 300 ? bias circuit 0.57 0.6 0.63 input voltage high-impedance input circuit 0.3 x v vid 0.36 x v vid v bias circuit 10 input resistance high-impedance input circuit 222 k ? dc characteristics dc voltage gain av guaranteed by output voltage swing 1.95 2 2.05 v/v dc gain mismatch among r, g, and b outputs guaranteed by output voltage swing of tv_r/c_out, tv_g_out, and tv_b_out; first input signal set is vcr_r/c_in, vcr_g_in, and vcr_b_in; second signal set is enc_r/c_in, enc_g_in, and enc_b_in -2 +2 % sync-tip clamp (v in = v clp ) 0.1 0.30 0.51 output level bias circuit 1.3 1.5 1.78 v sync-tip clamp, measured at output, v vid = 3v, v in = v clp to (v clp +1.15v), r l = 150 ? to v vid /2, r l = 75 ? to gndvid 2.3 measured at output, v vid = 3.135v, v in = v clp to (v clp + 1.15v), r l = 150 ? to v vid /2, r l = 75 ? to gndvid 2.243 2.3 2.358 bias circuit, measured at output, v vid = 3v, v in = (v bias - 0.575v) to (v bias + 0.575v), r l = 150 ? to v vid /2, r l = 75 ? to gndvid 2.3 output voltage swing measured at output, v vid = 3.135v, v in = (v bias - 0.575v) to (v bias + 0.575v), r l = 150 ? to v vid /2, r l = 75 ? to gndvid 2.243 2.3 2.358 v p-p output short-circuit current 100 ma output resistance r out 0.5 ? output leakage current output disabled (load detection not active) 170 ? power-supply rejection ratio 3v v vid 3.6v 35 db electrical characteristics (continued) (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1)
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 4 _______________________________________________________________________________________ electrical characteristics (continued) (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units ac characteristics filter passband flatness v out = 2v p-p , f = 100khz to 5.5mhz -1 db f = 9.5mhz 3 f = 27mhz 40 filter attenuation v out = 2v p-p , attenuation is referred to 100khz f = 54mhz 55 db slew rate v out = 2v p-p , no filter in video path 60 v/? settling time v out = 2v p-p , settle to 0.1% (note 3) 400 ns differential gain dg 5-step modulated staircase, f = 4.43mhz 0.15 % differential phase dp 5-step modulated staircase, f = 4.43mhz 0.5 degrees 2t pulse-to-bar k rating 2t = 200ns, bar time is 18?, the beginning 2.5% and the ending 2.5% of the bar time is ignored 0.3 k% 2t pulse response 2t = 200ns 0.2 k% 2t bar response 2t = 200ns, bar time is 18?, the beginning 2.5% and the ending 2.5% of the bar time is ignored 0.2 k% nonlinearity 5-step staircase 0.1 % group delay distortion 100khz f 5mhz, outputs are 2v p-p 11 ns glitch impulse caused by charge-pump switching measured at outputs 100 pv-s peak signal to rms noise 100khz f 5mhz 70 db power-supply rejection ratio f = 100khz, 100mv p-p 47 db output impedance f = 5mhz 2 ? video crosstalk f = 4.43mhz -80 db reverse isolation vcr scart inputs to encoder inputs, full-power mode with vcr being looped through to tv, f = 4.43mhz 92 db pulldown resistance enable vcr_r/c_out pulldown through i 2 c interface 4.4 7.5 ? audio characteristics voltage gain v in = -0.707v to +0.707v 3.95 4 4.05 v/v gain mismatch v in = -0.707v to +0.707v -1.5 +1.5 % flatness f = 20hz to 20khz, 0.25v rms input 0.006 db frequency bandwidth 0.25v rms input, frequency where output is -3db referenced to 1khz 230 khz capacitive drive no sustained oscillations; 75 ? series resistor on output 300 pf
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors _______________________________________________________________________________________ 5 electrical characteristics (continued) (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units input resistance v in = -0.707v to +0.707v 10 m ? input bias current v in = 0, t a = +25? 500 na input signal amplitude f = 1khz, thd < 1% 0.5 v rms output dc level no input signal, v in grounded -4 +4 mv dc 75 100 power-supply rejection ratio f = 1khz 90 db signal-to-noise ratio f = 1khz, 0.25v rms input, 20hz to 20khz 96 db r l = 3.33k ? , f = 1khz, 0.25v rms input 0.002 total harmonic distortion plus noise r l = 3.33k ? , f = 1khz, 0.5v rms input 0.001 % output impedance f = 1khz 0.4 ? volume control attenuation step programmable gain to tv scart volume control from -62db to 0 2db volume control minimum attenuation 0db volume control maximum attenuation 62 db mute suppression f = 1khz, 0.25v rms input 110 db audio crosstalk f = 1khz, 0.25v rms input 100 db video-to-audio interaction crosstalk video input: f = 15khz, 1v p-p signal audio input: f = 15khz, 0.5v rms signal 92 db charge pump switching frequency 570 khz fast switching input low 0.4 v input high level 1v input current t a = +25? 10 a output low voltage i ol = 0.5ma 0.1 v output high voltage i oh = 0.5ma v vid - 0.1 v output resistance 7 ? rise time 143 ? to gndvid 12 ns fall time 143 ? to gndvid 10 ns slow switching input low voltage 2v input medium voltage 4.5 7 v input high voltage 9.5 v
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 6 _______________________________________________________________________________________ electrical characteristics (continued) (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units input current 70 100 ? output low voltage 10k ? to ep, 11.4v v 12 12.6v 1.5 v output medium voltage 10k ? to ep, 11.4v v 12 12.6v 5 6.5 v output high voltage 10k ? to ep, 11.4v v 12 12.6v 10 v digital interface input high voltage v ih 0.7 x v vid v input low voltage v il 0.3 x v vid v input hysteresis v hys 0.06 x v vid v input leakage current i ih , i il t a = +25? -1 +1 a input capacitance 6pf input current 0.1v vid < sda < 3.3v, 0.1v vid < scl < 3.3v i/o pins of fast-mode devices must not obstruct the sda and scl lines if v+ is switched off, t a = +25? -10 +10 ? output low voltage sda v ol i sink = 6ma 0.4 v serial-clock frequency f scl 0 400 khz bus free time between a stop and a start condition t buf 1.3 ? hold time, (repeated) start condition t hd , sta 0.6 ? low period of the scl clock t low 1.3 ? high period of the scl clock t high 0.6 ? setup time for a repeated start condition t su , sta 0.6 ? data hold time t hd , dat (note 4) 0 0.9 ? data setup time t hd , dat 100 ns fall time of sda transmitting t f i sink 6ma, c b = total capacitance of one bus line in pf, t r and t f measured between 0.3v vid and 0.7v vid 100 ns setup time for stop condition t su , sto 0.6 ? pulse width of spike suppressed t sp input filters on the sda and scl inputs suppress noise spikes less than 50ns 050ns
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors _______________________________________________________________________________________ 7 electrical characteristics (continued) (v 12 = 12v, v vid = v aud = 3.3v, v gndvid = v ep = 0v, no load, t a = 0? to +70?, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units other digital i/o dev_addr low level 0.3 x v vid v dev_addr high level 0.7 x v vid v dev_addr input current t a = +25? -1 +1 a interrupt output low voltage i ol = 0.5ma 0.1 v interrupt output leakage current int high impedance, t a = +25? 10 a note 1: all devices are 100% production tested at t a = +25?. specifications over temperature limits are guaranteed by design. note 2: normal operation mode is full power with input video and load detection active. note 3: the settling time is measured from the 50% of the input swing to the 0.1% of the final value of the output. note 4: a master device must provide a hold time of at least 300ns for the sda signal (referred to v il of the scl signal) to bridge the undefined region of scl? falling edge. typical operating characteristics (v vid = v aud = 3.3v, v 12 = 12v, v gndvid = v ep = 0v, video load is 150 ? to gndvid, audio load is 10k ? to ep, t a = +25?, unless otherwise noted.) small-signal gain vs. frequency MAX9670 toc01 frequency (hz) gain (db) 100m 10m 1m -50 -40 -30 -20 -10 0 10 -60 100k 1g no filter v out = 100mv p-p filter small-signal gain flatness vs. frequency MAX9670 toc02 frequency (hz) gain (db) 10m -7 -6 -5 -4 -3 -2 -1 0 1 2 -8 1m 100m no filter v out = 100mv p-p filter large-signal gain vs. frequency MAX9670 toc03 frequency (hz) gain (db) 100m 10m 1m -50 -40 -30 -20 -10 0 10 -60 100k 1g no filter v out = 2v p-p filter
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 8 _______________________________________________________________________________________ typical operating characteristics (continued) (v vid = v aud = 3.3v, v 12 = 12v, v gndvid = v ep = 0v, video load is 150 ? to gndvid, audio load is 10k ? to ep, t a = +25?, unless otherwise noted.) large-signal gain flatness vs. frequency MAX9670 toc04 frequency (hz) gain (db) 10m -7 -6 -5 -4 -3 -2 -1 0 1 2 -8 1m 100m no filter filter video crosstalk vs. frequency MAX9670 toc05 frequency (hz) delay (ns) 10m 1m -100 -80 -60 -40 -20 0 -120 100k 100m v out = 100mv p-p all hostile group delay vs. frequency MAX9670 toc06 frequency (hz) delay (ns) 10m 1m 20 40 60 80 100 120 140 0 100k 100m v out = 2v p-p filter no filter video power-supply rejection ratio vs. frequency MAX9670 toc07 frequency (hz) psrr (db) 10m 1m -45 -40 -35 -30 -25 -20 -15 -10 -5 0 -50 100k 100m filter no filter video voltage gain vs. temperature MAX9670 toc08 input voltage (v) output voltage (v) 50 25 1.97 1.98 1.99 2.00 2.01 2.02 2.03 2.04 1.96 0 75 video output voltage vs. input voltage MAX9670 toc09 input voltage (v) output voltage (v) 1.2 0.8 0.4 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0 1.6 differential gain and phase MAX9670 toc10 differential phase (deg) 1 023 4 5 0.4 0.6 0.2 0 -0.2 -0.4 -0.6 differential gain (%) 0.2 0.3 0.1 0 -0.1 -0.2 -0.3 1 023 4 5 differential gain and phase MAX9670 toc11 differential phase (deg) 1 023 4 5 0.4 0.6 0.2 0 -0.2 -0.4 -0.6 differential gain (%) 0.2 0.3 0.1 0 -0.1 -0.2 -0.3 1 023 4 5 80ns/div 2t with filter video input 200mv/div video output 500mv/div MAX9670 toc12
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors _______________________________________________________________________________________ 9 typical operating characteristics (continued) (v vid = v aud = 3.3v, v 12 = 12v, v gndvid = v ep = 0v, video load is 150 ? to gndvid, audio load is 10k ? to ep, t a = +25?, unless otherwise noted.) 80ns/div 2t no filter video input 200mv/div video output 500mv/div MAX9670 toc13 1 s/div 12.5t with filter video input 200mv/div video output 500mv/div MAX9670 toc14 1 s/div 12.5t no filter video input 200mv/div video output 500mv/div MAX9670 toc15 10 s/div ntc7 with filter video input 500mv/div video output 1v/div MAX9670 toc16 10 s/div ntc7 no filter video input 500mv/div video output 1v/div MAX9670 toc17 2ms/div field square wave video input 500mv/div video output 1v/div MAX9670 toc18
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 10 ______________________________________________________________________________________ typical operating characteristics (continued) (v vid = v aud = 3.3v, v 12 = 12v, v gndvid = v ep = 0v, video load is 150 ? to gndvid, audio load is 10k ? to ep, t a = +25?, unless otherwise noted.) video input sync-tip clamp voltage vs. temperature MAX9670 toc19 temperature ( c) input clamp voltage (mv) 50 25 -5 -4 -3 -2 -1 0 1 2 -6 0 75 video input bias voltage vs. temperature MAX9670 toc20 temperature ( c) input bias voltage (mv) 50 25 585 590 595 600 605 610 615 620 580 0 75 video input sync-tip clamp current vs. temperature MAX9670 toc21 temperature ( c) input clamp current (ma) 50 25 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 0.6 0 75 0 2 1 4 3 7 6 5 8 0 1.0 0.5 1.5 2.0 2.5 3.0 3.5 video input sync-tip clamp current vs. input voltage MAX9670 toc22 input voltage (v) input clamp current ( a) video output bias voltage vs. temperature MAX9670 toc23 temperature ( c) output bias voltage (v) 50 25 1.43 1.44 1.45 1.46 1.47 1.48 1.49 1.50 1.42 0 75 audio large-signal gain vs. frequency MAX9670 toc24 frequency (hz) gain (db) 100k 10k 1k 100 -15 -10 -5 0 5 10 -20 10 1m
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 11 0 10 5 20 15 25 30 0255075 v vid quiescent supply current vs. temperature MAX9670 toc28 temperature ( c) current (ma) 0 1 3 2 4 5 v aud quiescent supply current vs. temperature MAX9670 toc29 temperature ( c) current (ma) 02550 75 v 12 quiescent supply current vs. temperature MAX9670 toc30 temperature ( c) current (na) 50 25 100 200 300 400 500 600 700 800 0 0 75 typical operating characteristics (continued) (v vid = v aud = 3.3v, v 12 = 12v, v gndvid = v ep = 0v, video load is 150 ? to gndvid, audio load is 10k ? to ep, t a = +25?, unless otherwise noted.) audio crosstalk vs. frequency MAX9670 toc25 frequency (hz) crosstalk (db) 10k 1k 100 -100 -80 -60 -40 -20 0 -120 10 100k total harmonic distortion plus noise vs. frequency MAX9670 toc26 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 0.0001 10 100k tvin to vcrout v in = 0.25v rms tvin to tvout v aud power-supply rejection ratio (input referred) vs. frequency MAX9670 toc27 frequency (hz) psrr (db) 10k 1k 100 -100 -80 -60 -40 -20 0 -120 10 100k v aud = 3.3v + 100mv p-p
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 12 ______________________________________________________________________________________ pin description pin MAX9670 max9671 name function 1 1 sda bidirectional i 2 c data i/o. output is open drain and tolerates up to 3.6v. 2 2 scl i 2 c clock input 3 3 dev_addr device address set input. connect to gndvid, v vid , sda or scl. see table 3. 44 int interrupt output. this is an open-drain output that pulls down to gndvid to indicate a change in the vcr slow switching or fast switching input, the activity status of the composite video inputs, or the load status of the composite video outputs. 55 v aud audio supply. connect to a 3.3v supply. bypass with a 10? aluminum electrolytic capacitor and a 0.47? ceramic capacitor to ep. 6 6 c1p charge-pump flying capacitor positive terminal. connect a 0.47? capacitor from c1p to c1n. 7 7 c1n charge-pump flying capacitor negative terminal. connect a 0.47? capacitor from c1p to c1n. 8 8 cpvss c har g e- p um p n eg ati ve p ow er s up p l y. byp ass w i th a 1f cer am i c cap aci tor to e p . 9 9 enc_inl encoder left-channel audio input 10 10 enc_inr encoder right-channel audio input 11 tv_inl tv scart left-channel audio input 12 tv_inr tv scart right-channel audio input 11 13 vcr_inl vcr scart left-channel audio input 12 14 vcr_inr vcr scart right-channel audio input 13 15 tv_outl tv scart left-channel audio output 14 16 vcr_outl vcr scart left-channel audio output 15 17 vcr_outr vcr scart right-channel audio output 16 18 tv_outr tv scart right-channel audio output 17 19 tv_ss tv scart bidirectional slow-switch signal 18 20 v 12 +12v supply for the slow switching circuit. bypass with a 10? + 0.47? ceramic capacitor to ep. 19 21 vcr_ss vcr scart bidirectional slow-switch signal 20 22 tvout_fs tv scart fast-switching logic output 23, 44 n.c. no connection. leave unconnected. 21 24 vcrin_fs vcr scart fast-switching logic input 22 25 enc_b_in encoder blue video input 23 26 enc_g_in encoder green video input 24 27 vcr_b_in vcr scart blue video input 25 28 vcr_g_in vcr scart green video input 26 29 tv_b_out tv scart blue video output 27 30 tv_g_out tv scart green video output
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 13 detailed description the MAX9670/max9671 represents maxim? third gen- eration of scart audio/video (a/v) switches. under i 2 c control, these devices route audio, video, and control information between the set-top box decoder chip and two scart connectors. the audio signals are left audio and right audio. the video signals are composite video with blanking and sync (cvbs) and component video (red, green, blue). s-video (y/c) can be transported across the scart interface if cvbs is reassigned to luma (y) and red is reassigned to chroma (c). support for s-video is optional. the slow-switch signal and the fast-switch signal carry control information. the slow- switch signal is a 12v, three-level signal that indicates whether the picture aspect ratio is 4:3 or 16:9 or causes the television to use an internal a/v source such as an antenna. the fast-switch signal indicates whether the television should display cvbs or rgb signals. cvbs, left audio, and right audio are full duplex. all the other signals are half duplex. therefore, one device on the link must be designated as the transmitter, and the other device must be designated as the receiver. the low power consumption and the advanced monitor- ing functions of the MAX9670/max9671 enable the cre- ation of lower power set-top boxes, televisions, and dvd players. unlike competing scart ics, the audio and video circuits of the MAX9670/max9671 operate entirely from 3.3v rather than from 5v and 12v. only the slow-switch circuit of the MAX9670/max9671 requires a 12v supply. the MAX9670/max9671 also have circuits that detect activity on the cvbs inputs, loads on the cvbs outputs, and the level of the slow-switch signals. the int signal informs the microcontroller if there are any changes so that the microcontroller can intelli- gently decide whether to power up or power down the equipment. in addition, the MAX9670/max9671 have directdrive audio circuitry to eliminate click-and-pop noise. with directdrive, the dc bias of the audio line outputs is always at ground, no matter whether the MAX9670/ max9671 are being powered up or powered down. conventional audio line output drivers that operate from a single supply require series ac-coupling capacitors. during power-up, the dc bias on the ac-coupling capac- itor moves from ground to a positive voltage, and during power-down, the opposite occurs. the changing dc bias usually causes an audible transient. pin description (continued) pin MAX9670 max9671 name function 28 31 gndvid video ground 29 32 vcr_r/c_in vcr scart red/chroma video input 30 33 v vid video and digital supply. connect to a 3.3v supply. bypass with parallel 1? and 0.1? ceramic capacitors to gndvid. v vid also serves as a digital supply for the i 2 c interface. 31 34 enc_c_in encoder chroma video input 32 35 enc_r/c_in encoder red/chroma video input 33 36 tv_r/c_out tv scart red/chroma video output 34 37 vcr_r/c_out vcr scart red/chroma video output 35 38 vcr_y/cvbs_out vcr scart luma/composite video output 36 39 tv_y/cvbs_out tv scart luma/composite video output 37 40 vcr_y/cvbs_in vcr scart luma/composite video input 38 41 tv_y/cvbs_in tv scart luma/composite video input 39 42 enc_y_in encoder luma video input 40 43 enc_y/cvbs_in encoder scart luma/composite video input ep exposed pad. the exposed pad is the internal ground for the audio amplifiers and charge pump. a low-impedance connection between ground and ep is required for proper isolation.
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 14 ______________________________________________________________________________________ audio section the MAX9670 audio circuit is essentially a stereo, 2-by-2, nonblocking, audio crosspoint with output dri- vers. the encoder (stereo audio dac) and the vcr are the two input sources, and the two outputs go to the tv scart connector and the vcr scart connector. see figure 1. the max9671 audio circuit is similar to that of the MAX9670 except that it is a stereo, 3-by-2, nonblocking audio crosspoint with tv as the third input source. the integrated charge pump inverts the +3.3v supply to create a -3.3v supply. the audio circuit operates from bipolar supplies so the audio signal is always biased to ground. enc_inl vcr_inl x4 zcd (0.5v rms full-scale input) (2v rms full-scale output) (2v rms full-scale output) tv_outl tv_outr mute v aud c1p ep c1n cpvss charge pump scl sda register control dev_addr mute mute mute mute vcr_outl vcr_outr *tv_inl enc_inr vcr_inr *tv_inr x4 x4 volume control 0db to -62db volume control 0db to -62db *max9671 only. mute MAX9670/max9671 x4 figure 1. MAX9670/max9671 audio section functional diagram
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 15 clickless switching the tv audio channel incorporates a zero-crossing detect (zcd) circuit that minimizes click noise due to abrupt signal level changes that occur when switching between audio signals at an arbitrary moment. to implement the zero-crossing function when switch- ing audio signals, set the zcd bit high (audio control register 00h, bit 6). then set the mute bit high (audio control register 00h, bit 0). next, wait for a sufficient period of time for the audio signal to cross zero. this period is a function of the audio signal path? low-fre- quency 3db corner (f l3db ). thus, if f l3db = 20hz, the time period to wait for a zero-crossing detect is 1/20hz or 50ms. after the wait period, select a new audio source for the tv audio channel by writing to bits 1 and 0 of tv audio control register (01h). finally, clear mute (audio control register, 00h, bit 0), but leave zcd (audio control reg- ister 00h, bit 6) high. the MAX9670/max9671 switches the signal out of mute at the next zero crossing. see tables 12 and 13. audio outputs the MAX9670/max9671 audio output amplifiers feature maxim? patented directdrive architecture, thereby eliminating the need for output-coupling capacitors required by conventional single-supply audio line dri- vers. an internal charge pump inverts the positive sup- ply (v aud ), creating a negative supply (cpvss). the audio output amplifiers operate from these bipolar sup- plies with their outputs biased about audio ground (figure 2). the benefit of this audio ground bias is that the amplifier outputs do not have a dc component. the dc-blocking capacitors required with conventional audio line drivers are unnecessary, conserving board space, reducing system cost, and improving frequency response. conventional single-supply audio line drivers have their outputs biased about a nominal dc voltage (typically half the supply) for maximum dynamic range. large coupling capacitors are needed to block this dc bias. clicks and pops are created when the coupling capaci- tors are charged during power-up and discharged dur- ing power-down. the MAX9670/max9671 features a low-noise charge pump that requires only two small ceramic capacitors. the 580khz switching frequency is well beyond the audio range and does not interfere with audio signals. the switch drivers feature a controlled switching speed that minimizes noise generated by turn-on and turn-off transients. the scart standard specifies 2v rms as the full-scale for audio signals. as the audio circuits process 0.5v rms full-scale audio signals internal to the MAX9670/max9671, the gain-of-4 output amplifiers restore the audio signals to a full-scale of 2v rms . to select which audio input source is routed to the tv scart connector, write to bits 1 and 0 of the tv audio control register (01h). to select which audio input source is routed to the vcr scart connector, write to bits 3 and 2 of the tv audio control register (01h). the power-on default is for the tv and vcr audio outputs to be muted (the inputs of the output amplifiers are con- nected to audio ground). see tables 10 and 13. volume control volume control is programmable from -62db to 0db in 2db steps through i 2 c interface. the block consists of a resistive ladder network to generate 31 2db volume control steps, a unity gain buffer to isolate the input from the resistive ladder, switches (mplx and mnlx) that select 1 of 32 nodes on the resistive ladder, and logic to decode the the i 2 c volume control value. see table 12. +v dd -v dd gnd v out conventional driver-biasing scheme directdrive biasing scheme v dd /2 v dd v dd gnd 2v dd figure 2. conventional driver output waveform vs. MAX9670/ max9671 output waveform.
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 16 ______________________________________________________________________________________ video section the video circuit routes different video formats between the set-top box decoder, the tv scart connector, and the vcr scart connector. it also routes slow-switch and fast-switch control information. see figure 3. MAX9670/max9671 a v = 2v/v tv_y/cvbs_in mute tv_y/cvbs_out load sense a v = 2v/v vcr_y/cvbs_out load sense clamp vcr_y/cvbs_in clamp enc_y/cvbs_in clamp enc_y_in clamp activity detect activity detect activity detect activity detect lpf lpf a v = 2v/v mute tv_r/c_out a v = 2v/v vcr_r/c_out vcr_r/c_in clamp/bias enc_r/c_in clamp/bias enc_c_in clamp/bias lpf lpf a v = 2v/v mute tv_g_out vcr_g_in clamp enc_g_in clamp lpf a v = 2v/v mute tv_b_out vcr_b_in clamp enc_b_in clamp lpf a v = 1v/v vcrin_fs 0.7v v vid gndvid tvout_fs to i 2 c a v = 1v/v v 12 +6v ep tv_ss x1 to i 2 c a v = 1v/v v 12 +6v ep vcr_ss x1 figure 3. MAX9670/max9671 video section function diagram
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 17 video inputs whether the incoming video signal is ac-coupled or dc-coupled into the MAX9670/max9671 depends upon the origin, format, and voltage range of the video signal. table 1 below shows the recommended con- nections. always ac-couple an external video signal through a 0.1? capacitor because its voltage is not well defined (see the typical application circuit ). for example, the video transmitter circuit might have a dif- ferent ground than the video receiver, thereby level shifting the dc bias. 60hz power line hum might cause the video signal to change dc bias slowly. internal video signals that are between 0 and 1v can be dc-coupled. most video dacs generate video signals between 0 and 1v because the video dac sources cur- rent into a ground-referenced resistor. for the minority of video dacs that generate video signals between 2.3v and 3.3v because the video dac sinks current from a v vid -referenced resistor, ac-couple the video signal to the MAX9670/max9671. the MAX9670/max9671 restore the dc level of incom- ing, ac-coupled video signals with either transparent sync-tip clamps or bias circuits. when using an ac- coupled input, the transparent sync-tip clamp automati- cally clamps the input signal minimum to ground, preventing it from going lower. a small current of 1? pulls down on the input to prevent an ac-coupled sig- nal from drifting outside the input range of the part. use sync-tip clamps with cvbs, rgb, and luma signals. the transparent sync-tip clamp is transparent when the incoming video signal is dc-coupled and at or above ground. under such conditions, the clamp never acti- vates. therefore, the outputs of video dacs that gener- ate signals between 0 and 1v can be directly connected to the MAX9670/max9671 inputs. the bias circuit accepts ac-coupled chroma, which is a subcarrier with the color information modulated onto it. the bias voltage of the bias circuits is around 600mv. enc_r/c_in and vcr_r/c_in can receive either a red video signal or a chroma video signal. set the input con- figuration by writing to bits 7 and 3 of the vcr video input control register (08h). see tables 10 and 16. the MAX9670/max9671 also have video input detec- tion. when activated, activity detect circuits check if sync is present on incoming cvbs signals. if so, then there is a valid video signal. read bits 2, 3, 4, and 5 of the video activity status register (0fh) to determine the status of the cvbs inputs. see table 21. in high-impedance mode, the inputs to the MAX9670/ max9671 do not distort the video signal in case the out- puts of the video dac are also connected to another video circuit such as a high-definition video filter amplifi- er. see the scart set-top box with analog hd outputs section. the inputs in high-impedance mode are biased at v vid /3, which is sufficiently above ground so that the esd diodes never forward biases as the video signal changes. the input resistance is 222k ? , which presents negligible loading on the video current dac. video reconstruction filter the video dac outputs of the set-top box decoder chip need to be lowpass-filtered to reject the out-of-band noise. the MAX9670/max9671 integrate sixth-order, butterworth filters. the filter passband (?db) is typical- ly 5.5mhz, and the attenuation at 27mhz is 52db. the filters are suited for standard-definition video. video outputs the video output amplifiers can both source and sink load current, allowing output loads to be dc- or ac- coupled. the amplifier output stage needs around 300mv of headroom from either supply rail. for video signals with a sync pulse, the sync tip is typically at 300mv, as shown in figure 4. for a chroma signal, the blank level is typically at 1.5v, as shown in figure 5. if the supply voltage is greater than 3.135v (5% below a 3.3v supply), each amplifier can drive two dc-cou- pled video loads to ground. if the supply is less than 3.135v, each amplifier can drive only one dc-coupled or ac-coupled video load. the scart standard allows for video signals to have a superimposed dc component within 0 and 2v. therefore, most video signals are dc-coupled at the output. in the unlikely event that the video signal needs to be ac-coupled, the coupling capacitors should be 220? or greater to keep the highpass filter formed by the 37.5 ? equivalent resistance of the video transmis- sion line to a corner frequency of 4.8hz or below to keep it well below the 25hz frame rate of the pal standard. the cvbs outputs have load sense circuits. if enabled, each load sense circuit checks for a load eight times per second by connecting an internal 15k ? pullup resistor to the output for 1ms. if the output is pulled up, no load is present. if the output stays low, a load is con- nected. read bits 1 and 3 to determine load status. see table 21. the selection of video sources that are sent to the tv scart connector are controlled by bits 0 to 4 of the tv
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 18 ______________________________________________________________________________________ video input control register (06h) while the selection of video sources that are sent to the vcr scart connec- tor are controlled by bits 0 to 2 of the vcr video input control register (08h). see tables 10, 14, and 16. the video outputs can be enabled or disabled by bits 2 through 7 of the output enable register (0dh) . see table 18. slow switching the MAX9670/max9671 support the iec 933-1, amendment 1, three-level slow switching that selects the aspect ratio for the display (tv). under i 2 c control, the MAX9670/max9671 set the slow-switching output voltage level. table 2 shows the valid input levels of the slow-switching signal and the corresponding operating modes of the display device. two bidirectional ports are available for slow-switching signals for the tv and vcr. the slow-switching input status is continuously read and stored in the status reg- ister (0eh). the slow-switching outputs can be set to a logic level or high impedance by writing to the tv video output control register (07h) and the vcr video output control register (09h). when enabled, int becomes active low if the voltage level changes on tv_ss or vcr_ss. see tables 10, 15, 17, and 20. fast switching the fast-switching signal was originally used to switch between cvbs and rgb signals on a pixel-by-pixel basis so that on-screen display (osd) information could be inserted. since modern set-top box decoder chips have integrated osd circuitry, there is no need to create osd information using the older technique. now, the fast-switching signal is just used to switch between cvbs and rgb signal sources. set the source of the fast-switching signal by writing to bits 4 and 3 of the tv video output control register (07h). the fast-switching signal to the tv scart con- nector can be enabled or disabled by bit 1 of the output enable register (0dh). see tables 10, 15, and 18. i 2 c serial interface the MAX9670/max9671 feature an i 2 c/smbus ? -com- patible, 2-wire serial interface consisting of a serial-data line (sda) and a serial-clock line (scl). sda and scl facilitate communication between the MAX9670/ max9671 and the master at clock rates up to 400khz. figure 6 shows the 2-wire interface timing diagram. the master generates scl and initiates data transfer on the bus. a master device writes data to the MAX9670/ max9671 by transmitting a start (s) condition, the proper slave address with the r/ w bit set to 0, followed by the register address and then the data word. each transmit sequence is framed by a start and a stop (p) condition. each word transmitted to the MAX9670/max9671 is 8 bits long and is followed by an acknowledge clock pulse. a master reads from the MAX9670/max9671 by transmitting the slave address with the r/ w bit set to 0, the register address of the reg- ister to be read, a repeated start (sr) condition, the slave address with the r/ w bit set to 1, followed by a series of scl pulses. the MAX9670/max9671 transmit data on sda in sync with the master-generated scl pulses. the master acknowledges receipt of each byte of data. each read sequence is framed by a start or MAX9670 fig04 20 s/div input 500mv/div output 500mv/div figure 4. MAX9670/max9671 video output with cvbs signal, multiburst video test signal shown MAX9670 fig05 10 s/div input 200mv/div output 200mv/div figure 5. MAX9670/max9671 video output with chroma (c) signal, multiburst video test signal shown
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 19 repeated start (sr) condition, an acknowledge or a not acknowledge, and a stop (p) condition. sda oper- ates as both an input and an open-drain output. a pullup resistor, typically greater than 500 ? , is required on the sda bus. scl operates as only an input. a pullup resistor, typically greater than 500 ? , is required on scl if there are multiple masters on the bus, or if the master in a single-master system has an open-drain scl output. series resistors in line with sda and scl are optional. series resistors protect the digital inputs of the MAX9670/max9671 from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl cycle. the data on sda must remain stable during the high period of the scl pulse. changes in sda while scl is high are control signals (see the start and stop conditions section). sda and scl idle high when the i 2 c bus is not busy. start and stop conditions sda and scl idle high when the bus is not in use. a master initiates communication by issuing a start (s) condition. a start condition is a high-to-low transition on sda with scl high. a stop condition is a low-to- high transition on sda while scl is high (figure 7). a start condition from the master signals the beginning of a transmission to the MAX9670/max9671. the mas- ter terminates transmission, and frees the bus, by issu- ing a stop condition. the bus remains active if a repeated start condition is generated instead of a stop condition. early stop conditions the MAX9670/max9671 recognize a stop condition at any point during data transmission except if the stop condition occurs in the same high pulse as a start condition. for proper operation, do not send a stop condition during the same scl high pulse as the start condition. slave address the slave address is defined as the 7 most significant bits (msbs) followed by the read/write (r/ w ) bit. set the r/ w bit to 1 to configure the MAX9670/max9671 to read mode. set the r/ w bit to 0 to configure the MAX9670/max9671 to write mode. the slave address is always the first byte of information sent to the MAX9670/max9671 after a start or a repeated start condition. the MAX9670/max9671 slave address is configurable with dev_addr. table 3 shows the possible slave addresses for the MAX9670/max9671. scl sda start condition stop condition repeated start condition start condition t hd, sta t su, sta t hd, sta t sp t buf t su, sto t low t su, dat t hd, dat t high t r t f figure 6. i 2 c serial-interface timing diagram scl sda ssrp figure 7. start, stop, and repeated start conditions
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 20 ______________________________________________________________________________________ acknowledge the acknowledge bit (ack) is a clocked 9th bit that the MAX9670/max9671 use to handshake receipt of each byte of data when in write mode (see figure 8). the MAX9670/max9671 pull down sda during the entire master-generated ninth clock pulse if the previous byte is successfully received. monitoring ack allows for detection of unsuccessful data transfers. an unsuc- cessful data transfer occurs if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master may retry communication. the master pulls down sda during the ninth clock cycle to acknowledge receipt of data when the MAX9670/max9671 are in read mode. an acknowl- edge is sent by the master after each read byte to allow data transfer to continue. a not acknowledge is sent when the master reads the final byte of data from the MAX9670/max9671, followed by a stop (p) condition. write data format a write to the MAX9670/max9671 consists of transmit- ting a start condition, the slave address with the r/ w bit set to 0, one data byte to configure the internal reg- ister address pointer, one or more data bytes, and a stop condition. figure 9 illustrates the proper frame format for writing one byte of data to the MAX9670/max9671. figure 10 illustrates the frame for- mat for writing n bytes of data to the MAX9670/ max9671. the slave address with the r/ w bit set to 0 indicates that the master intends to write data to the MAX9670/ max9671. the MAX9670/max9671 acknowledge receipt of the address byte during the master-generat- ed ninth scl pulse. the second byte transmitted from the master config- ures the MAX9670/max9671? internal register address pointer. the pointer tells the MAX9670/max9671 where to write the next byte of data. an acknowledge pulse is sent by the MAX9670/max9671 upon receipt of the address pointer data. 1 scl start condition sda 289 clock pulse for acknowledgment acknowledge not acknowledge figure 8. acknowledge a 0 slave address register address data byte acknowledge from MAX9670/max9671 r/w 1 byte acknowledge from MAX9670/max9671 acknowledge from MAX9670/max9671 b1 b0 b3 b2 b5 b4 b7 b6 s a a p figure 9. writing a byte of data to the MAX9670/max9671 1 byte autoincrement internal register address pointer acknowledge from MAX9670/max9671 acknowledge from MAX9670/max9671 b1 b0 b3 b2 b5 b4 b7 b6 a a 0 acknowledge from MAX9670/max9671 r/w s a 1 byte acknowledge from MAX9670/max9671 b1 b0 b3 b2 b5 b4 b7 b6 p a slave address register address data byte 1 data byte n figure 10. writing n bytes of data to the MAX9670/max9671
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 21 the third byte sent to the MAX9670/max9671 contains the data that is written to the chosen register. an acknowledge pulse from the MAX9670/max9671 sig- nals receipt of the data byte. the address pointer autoincrements to the next register address after each received data byte. this autoincrement feature allows a master to write to sequential register address locations within one continuous frame. the master signals the end of transmission by issuing a stop (p) condition. read data format the master presets the address pointer by first sending the MAX9670/max9671? slave address with the r/ w bit set to 0 followed by the register address after a start (s) condition. the MAX9670/max9671 acknowl- edges receipt of its slave address and the register address by pulling sda low during the ninth scl clock pulse. a repeated start (sr) condition is then sent followed by the slave address with the r/ w bit set to 1. the MAX9670/max9671 transmits the contents of the specified register. transmitted data is valid on the ris- ing edge of the master-generated serial clock (scl). the address pointer autoincrements after each read data byte. this autoincrement feature allows all regis- ters to be read sequentially within one continuous frame. a stop condition can be issued after any num- ber of read data bytes. if a stop condition is issued followed by another read operation, the first data byte to be read is from the register address location set by the previous transaction and not 00h and subsequent reads autoincrement the address pointer until the next stop condition. attempting to read from register addresses higher than 01h results in repeated reads from a dummy register containing ffh data. the master acknowledges receipt of each read byte during the acknowledge clock pulse. the master must acknowl- edge all correctly received bytes except the last byte. the final byte must be followed by a not acknowledge from the master and then a stop condition. figures 11 and 12 illustrate the frame format for reading data from the MAX9670/max9671. interrupt output when interrupt is enabled in modes 1 and 2, int , which is an open-drain output, pulls low under the following conditions: slow-switch signals change value, cvbs input signals are detected or disappear, and cvbs out- put loads are added or removed. when interrupt is enabled in mode 3, int pulls low only when the slow-switch signal changes value. enable int by writing a 1 into bit 4 of register 01h. see table 13. the interrupt can be cleared by reading register 0eh and 0fh. applications information audio inputs the maximum full-scale audio signal that can be applied to the audio inputs is 0.5v rms biased at ground. the recommended application circuit to atten- uate and bias an incoming audio signal is shown in figure 13. acknowledge from MAX9670/max9671 1 byte autoincrement internal register address pointer acknowledge from MAX9670/max9671 not acknowledge from master a a p a 0 acknowledge from MAX9670/max9671 r/w sa r/w repeated start sr 1 slave address register address slave address data byte figure 11. reading one indexed byte of data from the MAX9670/max9671 acknowledge from MAX9670/max9671 1 byte autoincrement internal register address pointer acknowledge from MAX9670/max9671 a a ap 0 acknowledge from MAX9670/max9671 r/w sa r/w repeated start sr 1 slave address register address slave address data byte figure 12. reading n bytes of indexed data from the MAX9670/max9671
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 22 ______________________________________________________________________________________ the audio path has a gain of 4v/v so that the full scale of the audio output signal is 2v rms . if less than 2v rms , full scale is desired at the audio outputs, and the full scale of the audio input signal should be proportionate- ly decreased below 0.5v rms . operating modes the MAX9670/max9671 has four operating modes, which can be set by writing to bits 6 and 7 of register 10h. see table 19. shutdown all circuitry is shutdown in the MAX9670/max9671 except for the i 2 c interface, which is designed with sta- tic cmos logic. except for register 10h, which sets the operating mode, the values in all of the other i 2 c regis- ters are preserved while entering, during, and leaving shutdown mode. standby mode in standby mode, the MAX9670/max9671 monitor the slow-switch signals and decide whether to loop through the audio/video signals. if the vcr slow switch input has activity (6v or 12v at the input), the audio/video sig- nals are looped through from the vcr scart to the tv scart. if the tv slow-switch input has activity, the audio/video signals are looped through from the tv scart to the vcr scart. if neither the vcr slow- switch input nor the tv slow switch input show activity, i.e., both inputs are at ground, no signals are looped through. if both the vcr slow-switch input and the tv slow-switch input have activity, the MAX9670/max9671 considers this condition to be illegal and does not loop through any signals. a finite state machine (figure 14) controls the operation of the MAX9670/max9671. state 0 is always the initial state when the MAX9670/max9671 enter standby mode. table 4 shows the values of the i 2 c registers in state 0. the state machine sets the other i 2 c registers to the correct values to loop through the audio/video signals in states 1 and 2 (see tables 5 and 6). when the MAX9670/max9671 leaves standby mode, the val- ues in all of the i 2 c registers except register 10h are preserved so that the operation is not disturbed. for example, if in standby mode, the MAX9670 is looping through the audio/video signals from vcr scart to tv scart, and if the microcontroller changes the operat- ing mode from standby mode to full-power mode, the audio/video signals continue to be looped through dur- ing and after the mode change. the user does not experience any disruption in audio or video service. the microcontroller can be turned off in standby mode because the MAX9670/1 operate autonomously. upon power-up, the default operating mode is standby mode. full-power mode with video input detection and video load detection in this mode, the MAX9670/max9671 are fully on. if interrupt is enabled, int goes active low whenever the slow-switch signal changes; a cvbs signal appears or disappears; or a cvbs load appears or disappears. the microcontroller can decide whether to change the routing configuration or operating mode of the MAX9670/max9671. full-power mode without video input detection and video load detection this mode is similar to the above mode except that video input detection and video load detection are not active. if interrupt is enabled, int goes active low only when the slow-switch signal changes. power consumption the quiescent power consumption and average power consumption of the MAX9670/max9671 are very low because of 3.3v operation and low-power circuit design. quiescent power consumption is defined when the MAX9670/max9671 are operating without loads and without any audio or video signals. table 7 shows the quiescent power consumption in all 4 operating modes. average power consumption is defined when the MAX9670/max9671 drives typical signals into typical loads. table 6 shows the average power consumption in full-power mode and table 9 shows the input and output conditions. MAX9670 1 f 6.65k ? *r1 values dac = cs4334/5/8/9: r1 = 4.53k ? , 1% dac = pcm1742: r1 = 5.57k ? , 1% r1* enc_inl 1 f 6.65k ? r1* enc_inr stereo audio dacs figure 13. application circuit to connect audio source to audio inputs. the 1? capacitor connected to the ground-referenced resistors biases the audio signal at ground. the resistors atten- uate the audio signal.
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 23 s-video the MAX9670/max9671 support s-video from the set- top box to the tv, set-top box to the vcr, and vcr to the set-top box. s-video was not included in the original scart specifications but was added afterwards. as a consequence, the luma (y) signal of s-video shares the same scart pin as the cvbs signal. likewise, the chroma (c) signal shares the same scart pin as the red signal. the pins that can carry both cvbs and luma have y/cvbs in their names, and the pins that can carry red and chroma have r/c in their names. now, the y/cvbs signals are full duplex while the r/c signals are half duplex. therefore, s-video is limited to being half duplex. the MAX9670/max9671 have to transmit a chroma signal and receive a chroma signal tv_ss not active vcr_ss not active tv_ss active vcr_ss active tv_ss not active vcr_ss active tv_ss active vcr_ss not active tv_ss not active vcr_ss active tv_ss active vcr_ss not active tv_ss not active vcr_ss active tv_ss not active vcr_ss not active tv_ss not active vcr_ss not active tv_ss active vcr_ss not active state 0 search audio: inactive video: inactive slow switch: listening for activity fast switch: inactive state 1 tv-to-vcr audio: tv to vcr video: tv to vcr slow switch: tv to vcr fast switch: not applicable state 2 vcr-to-tv audio: vcr to tv video: vcr to tv slow switch: vcr to tv fast switch: vcr to tv tv_ss active vcr_ss active tv_ss active vcr_ss active figure 14. standby mode finite state machine. tv_ss is active when either 6v or 12v are present. vcr_ss is active when either 6 v or 12v are present.
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 24 ______________________________________________________________________________________ on the same scart pin, but not at the same time. the 75 ? resistor connected to vcr_r/c_out must act as a back termination resistor when the MAX9670/max9671 is transmitting chroma signal and as an input termina- tion resistor when it is receiving a chroma signal. figure 15 shows how the MAX9670/max9671 transmits a chroma signal to the vcr scart connector while figure 16 shows how the MAX9670/max9671 receives a chroma from the vcr scart connector. write a 0 into bit 2 of register 09h to open the pulldown switch at vcr_r/c_out. to close the pulldown switch, write a 0 into bit 6 of register 0dh to turn off the output amplifier, and then write a 1 into register 09h. see tables 17 and 18. figure 15. gain-of-2 amplifier on vcr_r/c_out outputs chroma signal to vcr scart connector. notice that the pulldown switch on vcr_r/c_out is open. vcr scart tv scart a v = 2v/v tv_r/c_out a v = 2v/v vcr_r/c_out vcr_r/c_in bias enc_r/c_in bias enc_c_in bias lpf lpf on MAX9670/max9671 75 ? 75 ? 0.1 f figure 16. vcr_r/c_in receives chroma signal from vcr scart connector. notice that the pulldown switch on vcr_r/c_out is closed and that the gain-of-2 amplifier is off. the chroma signal from vcr scart is looped through to the tv scart in the above configuration. vcr scart tv scart a v = 2v/v tv_r/c_out a v = 2v/v vcr_r/c_out vcr_r/c_in bias enc_r/c_in bias enc_c_in bias lpf lpf off MAX9670/max9671 75 ? 75 ? 0.1 f
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 25 interfacing to an rf modulator if the set-top box modulates cvbs and mono audio onto an rf carrier (for example, channel 3), a simple application circuit can provide the needed signals (see figure 17). 10k ? resistor summer circuit between tv_outr and tv_outl creates the mono audio sig- nal. the resistor-divider to ground on tv_y/cvbs_out creates a video signal with normal amplitude. the unique feature of the MAX9670/max9671 that facilitates this application circuit is that the audio and video out- put amplifiers of the MAX9670/max9671 can drive mul- tiple loads if v aud and v vid are both greater than 3.135v. floating-chassis discharge protection and esd some set-top boxes have a floating chassis problem in which the chassis is not connected to earth ground. as a result, the chassis can charge up to 500v. when a scart cable is connected to the scart connector, the charged chassis can discharge through a signal pin. the equivalent circuit is a 2200pf capacitor charged to 311v connected through less than 0.1 ? to a signal pin. the MAX9670/max9671 are soldered on the pcb when it experiences such a discharge. therefore, the current spike flows through both external and inter- nal esd protection devices and is absorbed by the supply bypass capacitors, which have high capaci- tance and low esr. to better protect the MAX9670/max9671 against excess voltages during the cable discharge condition or esd events, add series resistors to all inputs and outputs to the scart connector if series resistors are not already present in the application circuit. also, add external esd protection diodes (for example, bav99) on all inputs and outputs to the scart connector. scart set-top box with analog hd outputs in set-top boxes with scart connectors and cinch connectors for high-definition ypbpr outputs, a triple- video dac usually outputs either standard-definition rgb signals that are routed to the MAX9670/max9671 or high-definition ypbpr signals that are routed through a high-definition filter amplifier like the max9653 (see figure 19). the set-top box devices have a limited num- ber of video dacs, and hence, one bank of triple-video dacs switches video format depending upon whether standard-definition rgb or high-definition ypbpr sig- nals are required. when rgb signals are desired, the high-definition filter amplifier should be turned off so that the rgb signals do not appear on the ypbpr connectors. the max9653/max9654 are well-suited for this application because their video inputs are in high-impedance mode when in shutdown. figure 17. application circuit to connect cvbs and mono audio from tv scart to rf modulator tv scart MAX9670/max9671 tv_outr tv_outl 10k ? 10k ? mono audio tv_y/cvbs_out 75 ? or greater 75 ? or greater 75 ? rf modulator
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 26 ______________________________________________________________________________________ figure 18. application circuit to connect series resistors and external esd protection diodes at MAX9670/max9671 outputs ep gndvid micro- controller stb chip vcr scart tv scart 75 ? tv_outr tv_outl tv_ss tv_b_out tv_g_out tv_r/c_out tvout_fs tv_y/cvbs_out tv_y/cvbs_in vcr_outr vcr_inr vcr_outl vcr_inl vcr_ss vcr_b_in vcr_g_in vcr_r/c_in vcr_r/c_out vcrin_fs vcr_y/cvbs_out vcr_y/cvbs_in c1n c1p cpvss +3.3 v sda scl int dev_addr enc_y/cvbs_in enc_r/c_in enc_g_in enc_b_in enc_y_in enc_c_in enc_inl enc_inr video encoder stereo audio dacs *r1 values dac = cs4334/5/8/9: r1 = 4.53k ? 1% dac = pcm1742: r1 = 5.57k ? 1% 1 f 1 f 75 ? 75 ? v 12 v aud v aud cpvss v vid 12v 3.3v 0.1 f tv_inl (max9671 only) tv_inr (max9671 only) MAX9670 max9671 0.1 f 3.3v 0.1 f 1 f 1 f 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? r1* 6.65k ? 1 f 75 ? 0.1 f 75 ? 0.1 f 75 ? 0.1 f 75 ? 75 ? 75 ? 0.1 f 0.1 f r1* 6.65k ? 1 f 2.55k ? 7.68k ? 2.55k ? 7.68k ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 1 f 2.55k ? 7.68k ? 75 ? 75 ? 75 ? 75 ? v aud cpvss v aud cpvss v aud cpvss v 12 ep v vid gndvid v vid gndvid v 12 ep v aud cpvss v aud cpvss v id gndvid v id gndvid v id gndvid v id gndvid v id gndvid v vid gndvid v vid gndvid v vid gndvid 75 ? v vid gndvid v aud cpvss 1 f 2.55k ? 7.68k ? v aud cpvss v vid gndvid v vid gndvid
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 27 similarly, when ypbpr signals are desired, enc_r/c_in, enc_g_in, and enc_b_in of the MAX9670/max9671 should be set to high-impedance mode by setting bit 4 in register 08h to high if those video inputs are ac-coupled. the high-impedance mode has higher priority whether enc_r/c_in is in sync-tip clamp or bias circuit mode (set by bit 3 in register 08h). if enc_r/c_in, enc_g_in, and enc_b_in are dc-coupled, the inputs should be left in sync-tip clamp mode. the rgb outputs of the MAX9670 should be muted or shut down. in either case, the inactive device should not distort the video signals generated by the dacs. power-supply bypassing the MAX9670/max9671 feature single 3.3v and 12v supply operation and require no negative supply. the 12v supply v 12 is for the scart switching function. for v 12 , place a 0.1? bypass capacitor as close as possi- ble. connect all v aud pins together to 3.3v and bypass with a 10? electrolytic capacitor in parallel with a 0.1? ceramic capacitor to audio ground. bypass each v vid to video ground with a 0.1? ceramic capacitor. using a digital supply the MAX9670/max9671 are designed to operate from noisy digital supplies. the high psrr (49db at 100khz) allows the MAX9670/max9671 to reject the noise from the digital power supplies (see the typical operating characteristics ). if the digital power supply is very noisy and stripes appear on the television screen, increase the supply bypass capacitance. an additional, smaller capacitor in parallel with the main bypass capacitor can reduce digital supply noise because the smaller capacitor has lower equivalent series resistance (esr) and equivalent series inductance (esl). layout and grounding for optimal performance, use controlled-impedance traces for video signal paths and place input termina- tion resistors and output back-termination resistors close to the MAX9670/max9671. avoid routing video traces parallel to high-speed data lines. the MAX9670/max9671 provide separate ground con- nections for video and audio supplies. for best perfor- mance, use separate ground planes for each of the ground returns and connect all ground planes together at a single point. see the MAX9670/max9671 evalua- tion kit for a proven circuit board layout example. if the MAX9670/max9671 are mounted using flow sol- dering or wave soldering, the ground via(s) for the ep pad should have a finished hole size of at least 14mils to insure adequate wicking of soldering onto the exposed pad. if the MAX9670/max9671 are mounted using solder mask technique, the via requirement does not apply. in either case, a good connection between the exposed pad and ground is required to minimize noise from coupling onto the outputs. figure 19. triple dac is connected to both a MAX9670 and a max9653/max9654 high-definition video-filter amplifier. (a) the MAX9670/max9671 are transmitting standard-definition rgb signals while the max9653/max9654 are in shutdown mode. (b) the MAX9670/max9671 are not transmitting rgb signals, but the max9653/max9654 are transmitting high-definition ypbpr signals. dac dac dac set-top box chip enc_r/c_in enc_g_in enc_b_in 75 ? 75 ? 75 ? tv_r/c_out tv_g_out tv_b_out max9653 max9654 scart connector off ypbpr outputs (a) 75 ? 75 ? 75 ? yout pbout prout yin pbin prin shdn dac 3.3v 3.3v 3.3v dac dac set-top box chip enc_r/c_in enc_g_in enc_b_in MAX9670/max9671 MAX9670/max9671 75 ? 75 ? 75 ? 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f tv_r/c_out tv_g_out tv_b_out max9653 max9654 3.3v 3.3v 3.3v 3.3v scart connector inputs set to high impedance inputs set to sync-tip clamp on ypbpr outputs (b) 75 ? 75 ? 75 ? yout pbout prout yin pbin prin shdn
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 28 ______________________________________________________________________________________ video origin format voltage range coupling input circuit configuration external cvbs unknown ac transparent sync-tip clamp external rgb unknown ac transparent sync-tip clamp external y unknown ac transparent sync-tip clamp external c unknown ac bias circuit internal cvbs 0 to 1v dc transparent sync-tip clamp internal r, g, b 0 to 1v dc transparent sync-tip clamp internal y, c 0 to 1v dc transparent sync-tip clamp internal y, pb, pr 0 to 1v dc transparent sync-tip clamp internal cvbs 2.3v to 3.3v ac transparent sync-tip clamp internal r, g, b 2.3v to 3.3v ac transparent sync-tip clamp internal y 2.3v to 3.3v ac transparent sync-tip clamp internal c 2.3v to 3.3v ac bias circuit table 1. recommended coupling for incoming video signals and input circuit configuration* * use a 0.1? capacitor to ac-couple a video signal into the MAX9670/max9671. slow-switching signal voltage (v) mode 0 to 2 display device uses an internal source such as a built-in tuner to provide a video signal. 4.5 to 7.0 display device uses a video signal from the scart connector and sets the display to 16:9 aspect ratio. 9.5 to 12.6 display device uses a signal from the scart connector and sets the display to 4:3 aspect ratio. table 2. slow-switching modes
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 29 dev_addr b7 b6 b5 b4 b3 b2 b1 b0 write address (hex) read address (hex) gndvid 1 0 01010 r/ w 94h 95h v vid 1001011 r/ w 96h 97h scl 1001100 r/ w 98h 99h sda 1001101 r/ w 9ah 9bh table 3. slave address register address (hexadecimal) value (binary) 00h uuuu uuuu 01h uuuu 1111 06h uuuu uuuu 07h uuuu uu10 08h uuuu uuuu 09h uuuu u010 0dh 0000 000u table 4. i 2 c register values in state 0* register address (hexadecimal) value (binary) 00h uuuu uuu0 01h uuuu 1011 06h uuuu uuuu 07h uuu0 0u10 08h uuuu u011 09h uuuu u0mm 0dh 1100 001u table 5. i 2 c register values in state 1* register address (hexadecimal) value (binary) 00h uuuu uuu0 01h uuuu 1101 06h uuu0 1010 07h uuu0 0unn 08h uuuu uuuu 09h uuuu u110 0dh 0011 111u table 6. i 2 c register values in state 2* * u indicates that the bit is unchanged from its previous state. * u indicates that the bit is unchanged from its previous state; mm = register 0eh (bit 0, bit 1) * u indicates that the bit is unchanged from its previous state; nn = register 0eh (bit 3, bit 2)
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 30 ______________________________________________________________________________________ operating mode power consumption (mw) shutdown 0.13 standby mode with no video activity (i.e., tv slow-switch and vcr slow-switch inputs are at ground). standby mode is the power-on default. 2.83 full-power mode with input video detection and video load detection active. 66 full-power mode without input video detection and video load detection active. 65 table 7. quiescent power consumption operating mode power consumption (mw) full-power mode with input video detection and video load detection active. 300 full-power mode without input video detection and video load detection active. 300 table 8. average power consumption pin (MAX9670) name type signal load 5v aud supply 3.3v n/a 9 enc_inl input 0.25v rms , 1khz n/a 10 enc_inr input 0.25v rms , 1khz n/a 11 vcr_inl input none n/a 12 vcr_inr input none n/a 13 tv_outl output 1v rms , 1khz 10k ? to ground 14 vcr_outl output 1v rms , 1khz 10k ? to ground 15 vcr_outr output 1v rms , 1khz 10k ? to ground 16 tv_outr output 1v rms , 1khz 10k ? to ground 17 tv_ss output 12v 10k ? to ground 18 v 12 supply 12v n/a 19 vcr_ss input 0 n/a 20 tvout_fs output 3.3v 150 ? to ground 21 vcrin_fs input 0 n/a 22 enc_b_in input 50% flat field n/a 23 enc_g_in input 50% flat field n/a 24 vcr_b_in input none n/a 25 vcr_g_in input none n/a 26 tv_b_out output 50% flat field 150 ? to ground 27 tv_g_out output 50% flat field 150 ? to ground 28 gndvid supply 0 n/a 29 vcr_r/c_in input none n/a 30 v vid supply 3.3v n/a table 9. conditions for average power consumption measurement
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 31 pin (MAX9670) name type signal load 31 enc_c_in input none n/a 32 enc_r/c_in input 50% flat field n/a 33 tv_r/c_out output 50% flat field 150 ? to ground 34 vcr_r/c_out output 50% flat field 150 ? to ground 35 vcr_y/cvbs_out output 50% flat field 150 ? to ground 36 tv_y/cvbs_out output 50% flat field 150 ? to ground 37 vcr_y/cvbs_in input none n/a 38 tv_y/cvbs_in input none n/a 39 enc_y_in input none n/a 40 enc_y/cvbs_in input 50% flat field n/a table 9. conditions for average power consumption measurement (continued) register address (hex) bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00h not used tv zcd tv volume control tv audio output mute 01h not used interrupt enable vcr audio selection tv audio selection 02h not used 03h not used 04h not used 05h not used 06h not used tv g and b video switch tv video switch 07h not used set tv fast switching not used set tv slow switching 08h vcr_r/c_in clamp not used enc r/g/b high- impedance bias enc_r/c_in clamp vcr video switch 09h not used vcr_r/c_out ground set vcr slow switching 0ah not used 0bh not used 0ch not used 0dh vcr_y/ cvbs_out enable vcr_r/ c_out enable tv_r/ c_out enable tv_g_out enable tv_b_out enable tv_y/ cvbs_out enable tvout_fs enable not used 10h operating mode not used table 10. data format for write mode
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 32 ______________________________________________________________________________________ register address (hex) bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0eh not used power-on reset not used vcr slow-switch input status tv slow switch input status 0fh not used enc_y_in input video detection enc_y/ cvbs_in input video detection vcr cvbs output load vcr cvbs input video detection tv cvbs output load tv cvbs input video detection table 11. data format for read mode bit description 76543210 comments 0off tv audio mute 1 on (power-on default) 0 0 0 0 0 0db gain (power-on default) 0 0 0 0 1 -2db gain 0 0 0 1 0 -4db gain 0 0 0 1 1 -6db gain 0 0 1 0 0 -8db gain 0 0 1 0 1 -10db gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 1 0 -60db gain tv volume control 1 1 1 1 1 -62db gain 0off tv zero-crossing detector 1 on (power-on default) table 12. register 00h: audio control bit description 76543210 comments 0 0 encoder audio 0 1 vcr audio 1 0 tv audio (max9671 only) input source for tv audio 1 1 mute (power-on default) 0 0 encoder audio 0 1 vcr audio 1 0 tv audio (max9671 only) input source for vcr audio 1 1 mute (power-on default) 0 disabled (power-on default) interrupt enable 1 enabled table 13. register 01h: tv audio
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 33 bit description 76543210 comments tv_y/cvbs_out tv_r/c_out 0 0 0 enc_y/cvbs_in enc_r/c_in 0 0 1 enc_y_in enc_c_in 0 1 0 vcr_y/cvbs_in vcr_r/c_in 0 1 1 tv_y/cvbs_in 1 0 0 not used not used 1 0 1 mute mute 1 1 0 mute mute input sources for tv video 111 mute (power-on default) mute (power-on default) tv_g_out tv_b_out 0 0 enc_g_in enc_b_in 0 1 vcr_g_in vcr_b_in 1 0 mute mute input sources for tv_g_out and tv_b_out 11 mute (power-on default) mute (power-on default) table 14. register 06h: tv video input control bit description 76543210 comments 0 0 low (< 2v) internal source 01 medium (4.5v to 7v); external scart source with 16:9 aspect ratio 1 0 high impedance (power-on default) set tv slow switching 11 high (> 9.5v); external scart source with 4:3 aspect ratio 0 0 gndvid (power-on default) 0 1 not used 1 0 same level as vcr_fb_in set tv fast switching 11 v vid table 15. register 07h: tv video output control
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 34 ______________________________________________________________________________________ bit description 76543210 comments vcr_y/cvbs_out vcr_r/c_out 0 0 0 enc_y/cvbs_in enc_r/c_in 0 0 1 enc_y_in enc_c_in 0 1 0 vcr_y/cvbs_in vcr_r/c_in 0 1 1 tv_y/cvbs_in mute 1 0 0 not used not used 1 0 1 mute mute 1 1 0 mute mute input sources for vcr video 111 mute (power-on default) mute (power-on default) 0 dc restore clamp active at input (power-on default) enc_r/c_in clamp/bias 1 chrominance bias applied at input 0 high-impedance bias off (power-on default) enc r/c, g, and b inputs high-impedance bias (in hd application) 1 biases the r/c, g, and b inputs to high impedance (overwrites the enc_r/c_in clamp and bias bit) 0 dc restore clamp active at input (power-on default) vcr_r/c_in clamp/bias 1 chrominance bias applied at input table 16. register 08h: enc and vcr video input/output control
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 35 bit description 76543210 comments 0 0 low (< 2v) internal source 01 medium (4.5v to 7v); external scart source with 16:9 aspect ratio 1 0 high impedance (power-on default) set vcr function switching 11 high (> 9.5v); external scart source with 4:3 aspect ratio 0 normal operation; pulldown on vcr_r/c_out is off (power-on default) vcr_r/c_out ground 1 ground; pulldown on vcr_r/c_out is on; the output amplifier driving vcr_r/c_out is off table 17. register 09h: vcr video output control bit description 76543210 comments 0 off (power-on default) tvout_fs enable 1on 0 off (power-on default) tv_y/cvbs_out enable 1on 0 off (power-on default) tv_b_out enable 1on 0 off (power-on default) tv_g_out enable 1on 0 off (power-on default) tv_r/c_out enable 1on 0 off (power-on default) vcr_r/c_out enable 1on 0 off (power-on default) vcr_y/cvbs_out enable 1on table 18. register 0dh: output enable
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 36 ______________________________________________________________________________________ bit description 76543210 comments 0 0 shutdown 01 standby mode (power-on default). input video detection circuits are active. audio circuitry is off unless video is detected. once slow switch is detected, the signal paths between the vcr and tv scart are connected. 10 full-power mode with input video detection and video-load detection active. operating mode 11 full-power mode without input video detection and video-load detection active. table 19. register 10h: operating modes bit description 76543210 comments 0 0 0 to 2v; internal source 01 4.5v to 7v; external source with 16:9 aspect ratio 1 0 not used tv slow-switching input status 11 9.5v to 12.6v; external source with 4:3 aspect ratio 0 0 0 to 2v; internal source 01 4.5v to 7v; external source with 16:9 aspect ratio 1 0 not used vcr slow-switching input status 11 9.5v to 12.6v; external source with 4:3 aspect ratio 0 v vid is too low for digital logic to operate 1 v vid is high enough for digital logic to operate power-on reset 1 the temperature is below the thermal shutdown limit table 20. register 0eh: status
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 37 bit description 76543210 comments 0 no video detected. tv cvbs input video detection 1 video detected. 0 no video detected. tv cvbs output load 1 video detected. 0 no video detected. vcr cvbs input video detection 1 video detected. 0 no load connected. vcr cvbs output load 1 load connected. 0 no video detected. enc_y/cvbs input video detection 1 video detected. 0 no video detected. enc_y_in input video detection 1 video detected. table 21. register 0fh: video activity status
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 38 ______________________________________________________________________________________ ep gndvid micro- controller stb chip vcr scart tv scart 75 ? tv_outr tv_outl tv_ss tv_b_out tv_g_out tv_r/c_out tvout_fs tv_y/cvbs_out tv_y/cvbs_in vcr_outr vcr_inr vcr_outl vcr_inl vcr_ss vcr_b_in vcr_g_in vcr_r/c_in vcr_r/c_out vcrin_fs vcr_y/cvbs_out vcr_y/cvbs_in c1n c1p cpvss +3.3 v sda scl int dev_addr enc_y/cvbs_in enc_r/c_in enc_g_in enc_b_in enc_y_in enc_c_in enc_inl enc_inr video encoder stereo audio dacs *r1 values dac = cs4334/5/8/9: r1 = 4.53k ? 1% dac = pcm1742: r1 = 5.57k ? 1% 1 f 1 f 75 ? v 12 v aud v vid 12v 3.3v 0.1 f tv_inl (max9671 only) tv_inr (max9671 only) MAX9670 max9671 0.1 f 3.3v 0.1 f 75 ? 75 ? 75 ? 75 ? 75 ? r1* 6.65k ? 1 f 75 ? 0.1 f 1 f 75 ? 0.1 f 75 ? 0.1 f 75 ? 75 ? 0.1 f 0.1 f r1* 6.65k ? 1 f 2.55k ? 7.68k ? 2.55k ? 7.68k ? 2.55k ? 7.68k ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 1 f 2.55k ? 7.68k ? 75 ? 75 ? typical application circuit
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 39 MAX9670 max9671 40 tqfn top view 35 36 34 33 12 11 13 scl int v aud c1p c1n 14 sda tv_g_out vcr_g_in vcr_b_in gndvid vcr_r/c_in v vid enc_g_in enc_b_in 1 2 vcr_r/c_out 4567 27 28 29 30 26 24 23 22 vcr _y/cvbs_out tv_y/cvbs_out v 12 tv_ss tv_outr vcr_outr dev_addr tv_b_out 3 25 37 vcr_y/cvbs_in vcr_outl 38 39 40 tv_y/cvbs_in enc_y_in enc_y/cvbs_in tv_outl vcr_inr vcr_inl tv_r/c_out 32 15 vcr_ss enc_r/c_in 31 16 17 18 19 20 tvout_fs cpvss enc_inl enc_inr vcrin_fs 8910 21 enc_c_in ep* = exposed pad ep* = exposed pad dev_addr int v aud c1p c1n cpvss enc_inl enc_inr tv_inl scl sda 1 2 3 4 5 6 7 8 9 10 11 tv_r/c_out vcr_r/c_out vcr_y/cvbs_out tv _y/cvbs_out vcr_y/cvbs_in tv_y/cvbs_in enc_y_in enc_y/cvbs_in n.c. enc_r/c_in enc_c_in 34 35 36 37 38 39 40 41 42 43 44 v 12 tv_ss tv_outr vcr_outr vcr_outl tv_outl vcr_inr vcr_inl tv_inr vcr_ss tvout_fs 22 21 20 19 18 17 16 15 14 13 12 gndvid tv_g_out tv_b_out vcr_g_in vcr_b_in enc_g_in enc_b_in vcrin_fs n.c. vcr_r/c_in v vid 33 32 31 30 29 28 27 26 25 24 23 44 tqfn top view *ep *ep pin configurations chip information process: bicmos
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors 40 ______________________________________________________________________________________ package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . package type package code document no. 40 tqfn t4066+3 21-0141 44 tqfn t4477+2 21-0144 qfn thin.eps
MAX9670/max9671 low-power audio/video switch with audio volume control for dual scart connectors ______________________________________________________________________________________ 41 package information (continued) for the latest package outline information and land patterns, go to www.maxim-ic.com/packages .
package information (continued) for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 42 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. low-power audio/video switch with audio volume control for dual scart connectors MAX9670/max9671

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